1. Field of the Invention
This invention relates to a process for manufacturing an anisotropic conducting film with conducting inserts, in which at least one end of the inserts comprises a tip.
2. Discussion of the Background
In the micro-connections field, there are three main families of techniques for connecting chips or integrated circuits to an interconnection substrate, namely wire bonding, TAB connection and the xe2x80x9cFlip Chipxe2x80x9d technique. In the wire bonding technique, gold or aluminum wires are used to make the connections. The TAB (Tape Automated Bonding) connection uses an intermediate tape on which a conductors network is obtained by etching or chemical growth. According to the Flip Chip technique, chip input/output pins are connected by soldering or gluing onto the corresponding pins of a substrate. Flip Chip by soldering is done using meltable micro-bossings (also called balls). In the glued Flip Chip version, an anisotropic conducting film provides electrical conduction in z and good insulation in the xy plane.
Each of these techniques has advantages and disadvantages. From the point of the view of the contact quality obtained, the Flip Chip is by far the best technique, due to the limitation of the connection length obtained and due the soldering process itself. However, it involves a long and expensive process since it typically requires two lithography levels in order to define the location of the balls (bond metallurgy and balls).
The concept of the anisotropic conducting film, a sort of universal connector, eliminates lithography dedicated to each application and becomes very attractive. The main market targeted at the present time is for flat screens with the difficult problem of the connection of pixel control chips on the liquid crystal screens themselves. This conducting film is usually a filled epoxy glue which, as it cross-links, puts conducting fillers and the pins to be connected into contact in the z direction, while providing insulation in xy. The reliability and quality of these connections are well below the specifications for many applications, since 10% of flat screens for portable computers are recycled.
It is known how to make an electrical connection between the pins of a chip and the pins of an interconnection substrate facing it, using a conducting glue or an anisotropic conducting film by contact. This type of film or glue provides electrical contact in the z direction by compression of conducting particles incorporated in the polymer matrix forming the glue or the film. This compression may be applied mechanically from the outside, or may be obtained by cross-linking the glue itself which then shrinks. In both cases, the contact resistance is relatively high, and more importantly is not reproducible. In most cases, a finishing operation is necessary on the pins to be brought in contact. This is done by deposition of a gold or SnPb alloy plating on the pins. This finish improves the final contact resistance obtained. The particles can quickly be coated with a gold, silver or nickel surface layer.
A significant improvement to this anisotropic conducting film has been proposed. It consists of using nickel conducting particles that have a particular shape consisting of a sort of ball on which sharp protuberances are formed. The protuberances penetrate the oxide layer present on the surface of the pin to be connected at the time of assembly.
Anisotropic conducting films with a meltable base are also known. In this case, meltable particles, or particles covered with a meltable material, are used in a polymer matrix resisting high temperatures (for example a polyimide matrix). The pins to be connected are usually made of aluminum with a finish that can be soldered (Ni/Au or SnPb alloy). The meltable material from which the particles are made melts under pressure and/or by increasing the temperature to several hundred degrees (for example xe2x89xa7200xc2x0 C.), producing electrical contacts between the pins facing the chip and the interconnection substrate. Note that it is very difficult to solder particles through the polymer film simply by applying pressure-heating since the polymer surface quickly prevents satisfactory soldering of the balls to each other or onto the pins. In most cases, the improvement made using this technique is due to the good plasticity of the meltable material which, as it deforms, improves the presence of an electrical contact.
Another technique for obtaining an anisotropic conducting film consists of depositing a layer of meltable material on the pins of the chip and a layer of polyimide between the aluminum pins of the interconnection substrate. The chip and the substrate are then assembled, with the pins to be connected facing each other, by applying pressure and increasing the temperature (xe2x89xa7200xc2x0 C.). The disadvantage of this type of technique is that opening masks are necessary above the pins firstly to deposit the meltable material on the chip and secondly, the polyimide material onto the interconnection substrate. Therefore, the universal aspect of the anisotropic conducting film is lost.
Another anisotropic conducting film structure is known as VIS (Vertical Interconnection Sheet). This type of structure comprises an insulating film provided with conducting studs passing through the thickness of the film. FIG. 1 shows this type of structure, in a version called the xe2x80x9chardxe2x80x9d contact version. The structure is shown between two elements to be assembled; an interconnection substrate 2, provided with pins 6 and 8, and a chip 4 provided with pins 10 and 12. The structure must form the electrical bond between firstly pins 6 and 10, and secondly pins 8 and 12. It comprises a polyimide film 30 provided with projecting studs 32. This type of structure is obtained by localized etching of a copper plate subjacent to the polyimide film and by electrolytic growth of gold. The chip is assembled on the substrate using this VIS structure by compression. The disadvantage of this structure is that the production processes lead to relatively large pitches p between studs (of the order of 40 xcexcm). Another disadvantage is that the electrical bond by contact with the projecting gold studs does not enable bond of the polyimide film on the chip surface.
A similar structure is described in patent U.S. Pat. No. 5,304,460, illustrated in FIG. 2, in which an etched polymer film 34 is positioned between the chip 4 and the interconnection substrate 2, in the holes in which a meltable material 36 was evaporated. Subsequently, the studs 36 made of a meltable material are compressed between pins 6 and 10, and between pins 8 and 12. Depending on the nature of the polymer, there may be an adhesive effect of the polymer on the surface of the pin to be brought into contact. However, this adhesive effect is only obtained on the surface of the pins and not between the pins (for example in the intervals 35 and 37). Furthermore, preparation of the polymer in which a meltable material is evaporated to make the studs must be done beforehand on a support. The polymer layer then has to be separated from this support without removing the meltable material 36, which requires a cold process. Finally, the bond is still a xe2x80x9ccontactxe2x80x9d type since it is obtained by compression of the studs on the pins. Consequently, the contact remains mediocre even with a meltable material.
Document FR-A-2 726 397 discloses an anisotropic conducting film comprising a polymer layer 46 in which crossing conducting studs are provided, as shown in FIG. 3. The central part 52 of the studs is composed of a hard material (for example copper, nickel or an SnPb alloy meltable at high temperature). The ends 44 and 54 of the studs are composed of a meltable material (for example an SnPb alloy meltable at low temperature). The anisotropic conducting film in FIG. 3 will provide electrical connections between the pins 10 and 12 of chip 4 and between pins 6 and 8 of the interconnection substrate 2. These pins are covered by bond layers 56, 58, 60 and 62 to solder or bond the meltable materials 44 and 54. The electrical connection of the chip onto the substrate is made by increasing the temperature and possibly by applying pressure between the chip 4 and the substrate 2. The ends of the studs that are in contact with the bond layer present on the pins combine with this layer. This results in a reduction in the height of the studs between a pin on the chip and the pin facing the substrate. This height is gradually modified until it is equal to the height of the central part 52 of the studs. This phenomenon does not occur for the other studs, that are not facing a bond layer. The pitch of the studs obtained by the method described can be very small, but the pins to be connected have to be pre-treated so that they can be soldered if a good electrical contact is to be obtained and to maintain the benefit achieved by soldering the studs.
Patent U.S. Pat. No. 5,135,606 discloses processes for making VIS structures with adapted stud shapes. The described processes are suitable for producing VIS structures from a basic copper support. They can be used to obtain a tipped shape at the projecting ends of the studs or inserts. However, the tipped shape of the inserts is obtained by electrolytic growth in a resin comprising conical openings. This type of process cannot be used to produce tips with uniform slopes since the slopes of the patterns of the resin are not uniform themselves, firstly due to the use of chemical etching, and secondly due to the use of insolation with variable focusing. Furthermore, the shape of the tips obtained by this type of process cannot be reproduced from one tip to the next, and the result is a flattened vertex due to the fact that the mask opening cannot be completely closed to enable the electrolyte to pass.
For all these anisotropic conducting films according to prior art, note that:
if meltable particles or studs are used, a finish that can be soldered will be necessary on the pins to be connected, and therefore an additional layer will have to be deposited on these pins;
this finish is not necessary if the shape of the conducting particles is aggressive, but since the density of conducting particles is limited in the polymer matrix, problems will arise when the pitch between the pins to be connected is small or when a high current has to be passed.
Patent U.S. Pat. No. 5,135,606 describes structures with a variety of shapes of projecting studs. However, these structures appear to be very difficult to implement, particularly for the variant with projecting tipped studs.
This invention proposes a process for manufacturing an anisotropic conducting film with conducting inserts at a pitch that can be very small, these inserts having at least one end in the shape of a tip. The proposed process is simple and reproducible. It is based on the transfer of tips obtained on a substrate, for example in a chemical etching process, by electrolysis, atomization or evaporation.
The anisotropic conducting film obtained by this process can be used to mount a structure such as a chip (for example an integrated circuit) directly on the interconnection substrate, without any special processing being necessary for the pins of the chip. If the pins in the interconnection substrate are provided with a copper finishing layer, or a gold or SnPb finishing layer, there is no need for the inserts to have a tipped end on this side. Since pins on chips are usually made of aluminum without a finishing layer, the tips of the inserts will be on this side.
Therefore, the purpose of the invention is a process for manufacturing an anisotropic conducting film comprising an insulating film in which holes are formed, conducting inserts being located in the holes, the first ends of the inserts projecting from one side of the insulating film, from a substrate in which compartments are formed on one surface, corresponding to the distribution of inserts on the insulating film, the shape of the compartments being complementary to the shape of the first ends of the inserts, characterized in that it comprises the following steps:
a) use of a substrate with compartments with a tipped finish,
b) production of the insulating film above the substrate with holes facing the compartments,
c) production of conducting inserts in the holes and the compartments,
d) separation of the insulating film in which the conducting inserts are formed.
The substrate may be a single crystal and the compartments may be formed by etching, with at least the bottom of the compartments being etched along determined crystallographic planes.
The substrate may be made of silicon. The etching step may consist of chemical etching along the crystallographic plane (111) of a substrate starting from a face with a crystallographic plane (110).
A sacrificial layer matching the surface of the substrate can be deposited between step a) and step b), the insulating film being deposited on the sacrificial layer. In this case, the separation step may be made by chemical etching of the sacrificial layer. This chemical etching of the sacrificial layer may be complemented by a capillary effect.
Since the sacrificial layer is made of a conducting material, step c) may consist of making the conducting inserts grow by electrolysis in the compartments and the holes, using the sacrificial layer as an electrode.
Since the substrate is a conducting or doped semiconductor material, step c) may consist of making the conducting inserts grow by electrolysis in the compartments and the holes using the substrate as an electrode.
Step c) may consist of atomization or evaporation of the conducting material(s) that will form the inserts, in the compartments and the holes. In this case, the atomization or evaporation step may consist firstly of positioning a mask provided with holes at a given distance from the insulating film, the holes in the mask being in line with the compartments in the substrate and the holes in the film, and with a determined initial diameter, and then atomizing or evaporating the conducting material(s) forming the conducting inserts, through the holes in the mask. The said determined initial diameter of the holes in the film may be such that the second ends of the inserts also terminate in tips, due to the reduction in the initial diameter due to atomization or evaporation.
The separation step d) may use mechanical forces.
Step a) and step b) may consist firstly of depositing the insulating film on top of the substrate, possibly covered with a sacrificial layer in which compartments are not yet formed on the surface, and then positioning a mask in which holes are formed in a pattern corresponding to the distribution of inserts in the film, and then etching firstly the insulating film and possibly the sacrificial layer to form holes in it, and secondly the substrate to form compartments in it, through the holes in the mask, and finally eliminating the mask. In this case, if the inserts are made by electrolysis, a layer of conducting material matching the etched areas of the substrate may be deposited after the holes have been etched in the insulating film and before the mask is eliminated.
Advantageously, the first ends of the conducting inserts are made from a hard material. Consequently, these ends can penetrate through the oxide layer covering the pin to be connected. The inserts may be made entirely of this hard material. As a variant, a hard material may be used only for the projecting part of the inserts.
The insulating film may be a thermoplastic polymer film or a multi-layer film with thermoplastic outer layers. This can provide a self-sticking function at the time of the assembly. Otherwise, a layer of glue should be provided on it before assembly.
The cross-section of the holes etched in the insulating film may be smaller than the cross-section of the compartments on the said surface of the substrate. The result is that the inserts are embedded in the insulating film.